====== Write Verilog (Netlist) ======

===== Net List with DeCAP for Power =====

<code tcl>

#in icc
set force_cells [list DCAPNPNRTO10SXD DCAPNPNRTO9SXD DCAPNPNRTO8SXD DCAPNPNRTO7SXD DCAPNPNRTO6SXD DCAPNPNRTO5SXD DCAPNPNRTO4SXD DCAPNPNRTO3SXD]
write_verilog -no_unconnected_cells -force_output_references $force_cells ./${topLevel}_for_power.v

</code>

===== Net List without DeCAP for PrimeTime =====

<code tcl>
set dir .
set topLevel zx211000_htm
set version 0818_1320
 
###### Name changes 
## using icc native command (extra rule for some LSI legacy tools)
define_name_rules verilog -case_insensitive
change_names -hierarchy -rules verilog -verbose
write_verilog -no_unconnected_cells ${dir}/${topLevel}.${version}.v
</code>