vlsi:icc:start
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vlsi:icc:start [2014/11/26 02:50] (当前版本) |
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| + | ====== IC Compilier (ICC) ====== | ||
| + | |||
| + | ===== ICC Unitlity ===== | ||
| + | * [[vlsi:icc:dump-gif]] | ||
| + | * [[vlsi:icc:qor-re-format]] | ||
| + | ===== Floorplan ===== | ||
| + | * [[vlsi:icc:floorplan-boundary]] | ||
| + | * [[vlsi:icc:rp]] | ||
| + | * [[vlsi:icc:port-location]] | ||
| + | * [[vlsi:icc:macro-list]] | ||
| + | |||
| + | ===== Power Strap ===== | ||
| + | |||
| + | * [[vlsi:icc:macro-blockage]] | ||
| + | * [[vlsi:icc:io-blockage]] | ||
| + | * [[vlsi:icc:macro-side-routeguide]] | ||
| + | |||
| + | ===== Blockage ===== | ||
| + | * [[vlsi:icc:macro-blockage]] | ||
| + | * [[vlsi:icc:reverse-blockage]] | ||
| + | |||
| + | ===== Placement ===== | ||
| + | |||
| + | ===== CTS ===== | ||
| + | * [[vlsi:icc:script-Highlight-Clock-Paths]] | ||
| + | |||
| + | ===== Route ===== | ||
| + | |||
| + | * [[vlsi:icc:route:eco-via]] | ||
| + | |||
| + | |||
| + | ===== ICC Variables ===== | ||
| + | |||
| + | * [[vlsi:icc:variables]] | ||
| + | ===== GUI ===== | ||
| + | * [[vlsi:icc:show-clock-tree]] | ||
| + | ===== Post Route ===== | ||
| + | * [[vlsi:icc:write-verilog]] | ||
| + | * [[vlsi:icc:report-track-utilization]] | ||
| + | |||
| + | ===== Write Out Files ===== | ||
| + | * [[vlsi:icc:def]] | ||
| + | * [[vlsi:icc:frame]] | ||
| + | * [[vlsi:icc:write-verilog-netlist]] | ||
| + | * [[vlsi:icc:stream-out-gds2]] | ||
vlsi/icc/start.txt · 最后更改: 2014/11/26 02:50 (外部编辑)
除额外注明的地方外，本维基上的内容按下列许可协议发布： CC Attribution-Share Alike 4.0 International
