vlsi:icc:write-verilog-netlist
差别
这里会显示出您选择的修订版和当前版本之间的差别。
| — |
vlsi:icc:write-verilog-netlist [2011/11/17 03:05] (当前版本) |
||
|---|---|---|---|
| 行 1: | 行 1: | ||
| + | ====== Write Verilog (Netlist) ====== | ||
| + | |||
| + | ===== Net List with DeCAP for Power ===== | ||
| + | |||
| + | <code tcl> | ||
| + | |||
| + | #in icc | ||
| + | set force_cells [list DCAPNPNRTO10SXD DCAPNPNRTO9SXD DCAPNPNRTO8SXD DCAPNPNRTO7SXD DCAPNPNRTO6SXD DCAPNPNRTO5SXD DCAPNPNRTO4SXD DCAPNPNRTO3SXD] | ||
| + | write_verilog -no_unconnected_cells -force_output_references $force_cells ./${topLevel}_for_power.v | ||
| + | |||
| + | </code> | ||
| + | |||
| + | ===== Net List without DeCAP for PrimeTime ===== | ||
| + | |||
| + | <code tcl> | ||
| + | set dir . | ||
| + | set topLevel zx211000_htm | ||
| + | set version 0818_1320 | ||
| + | |||
| + | ###### Name changes | ||
| + | ## using icc native command (extra rule for some LSI legacy tools) | ||
| + | define_name_rules verilog -case_insensitive | ||
| + | change_names -hierarchy -rules verilog -verbose | ||
| + | write_verilog -no_unconnected_cells ${dir}/${topLevel}.${version}.v | ||
| + | </code> | ||
| + | |||
vlsi/icc/write-verilog-netlist.txt · 最后更改: 2011/11/17 03:05 (外部编辑)
除额外注明的地方外，本维基上的内容按下列许可协议发布： CC Attribution-Share Alike 4.0 International
