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vlsi:pt:cp-pin-attributes [2016/07/13 01:21] (当前版本)
行 1: 行 1:
 +====== CP Pin Attributes in PT ======
  
 +
 +<​code>​
 +****************************************
 +Report : Attribute
 +Design : zx222017_htm
 +Version: J-2014.06-SP3
 +Date   : Wed Jul 13 07:15:04 2016
 +****************************************
 +
 +Design ​         Object ​            ​Type ​     Attribute Name          Value
 +--------------------------------------------------------------------------------
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float actual_fall_transition_max 0.026053
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float actual_fall_transition_min 0.025954
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string actual_min_clock_pulse_width_high {sys_pll_clk 0.646206} ​
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string actual_min_clock_pulse_width_low {sys_pll_clk 0.615810} ​
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float actual_rise_transition_max 0.028376
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float actual_rise_transition_min 0.028043
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float annotated_fall_transition_delta_max 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float annotated_fall_transition_delta_min 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float annotated_rise_transition_delta_max 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float annotated_rise_transition_delta_min 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string arrival_window {{{sys_pll_clk} pos_edge {min_r_f 4.29448 NA} {max_r_f 4.5247 NA}} {{sys_pll_clk} neg_edge {min_r_f NA 4.311} {max_r_f NA 4.53857}}}
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c1_max_fall 0.000468
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c1_max_rise 0.000447
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c1_min_fall 0.000468
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c1_min_rise 0.000447
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c2_max_fall 0.000456
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c2_max_rise 0.000537
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c2_min_fall 0.000456
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float cached_c2_min_rise 0.000537
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string clock_capture_arrival_dynamic { {{sys_pll_clk} pos_edge {min_r_f 4.291430 NA} {max_r_f 4.527754 NA}} {{sys_pll_clk} neg_edge {min_r_f NA 4.307957} {max_r_f NA 4.541620}}}
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string clock_capture_arrival_static { {{sys_pll_clk} pos_edge {min_r_f 4.338070 NA} {max_r_f 4.474074 NA}} {{sys_pll_clk} neg_edge {min_r_f NA 4.350860} {max_r_f NA 4.486909}}}
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string clock_launch_arrival_dynamic { {{sys_pll_clk} pos_edge {min_r_f 4.292665 NA} {max_r_f 4.526515 NA}} {{sys_pll_clk} neg_edge {min_r_f NA 4.309193} {max_r_f NA 4.540384}}}
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string clock_launch_arrival_static { {{sys_pll_clk} pos_edge {min_r_f 4.339305 NA} {max_r_f 4.472836 NA}} {{sys_pll_clk} neg_edge {min_r_f NA 4.352095} {max_r_f NA 4.485674}}}
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP collection clocks sys_pll_clk
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float constraining_max_transition 0.332000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string direction in
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean disable_timing false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string escaped_full_name u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float fanout_load 1.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string full_name u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_latency_max_fall 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_latency_max_rise 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_latency_min_fall 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_latency_min_rise 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_transition_max_fall 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_transition_max_rise 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_transition_min_fall 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float ideal_transition_min_rise 0.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_async_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_clear_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_clock_gating_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_clock_pin true
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_clock_source false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_clock_used_as_clock true
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_clock_used_as_data false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_data_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_design_mismatch false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_fall_edge_triggered_clock_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_fall_edge_triggered_data_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_hierarchical false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_ideal false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_interface_logic_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_mux_select_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_negative_level_sensitive_clock_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_negative_level_sensitive_data_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_port false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_positive_level_sensitive_clock_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_positive_level_sensitive_data_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_preset_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_receiver_scaled_max_fall false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_receiver_scaled_max_rise false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_receiver_scaled_min_fall false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_receiver_scaled_min_rise false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_rise_edge_triggered_clock_pin true
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_rise_edge_triggered_data_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_three_state false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_three_state_enable_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean is_three_state_output_pin false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string lib_pin_name CP
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float max_fall_arrival 4.538574
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float max_fall_slack INFINITY
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float max_rise_arrival 4.526515
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float max_rise_slack -0.103151
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float max_transition 0.550000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float min_fall_arrival 4.311002
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float min_fall_slack INFINITY
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float min_rise_arrival 4.292665
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float min_rise_slack 0.914872
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string object_class pin
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float pin_capacitance_max 0.000595
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float pin_capacitance_max_fall 0.000523
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float pin_capacitance_max_rise 0.000595
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float pin_capacitance_min 0.000523
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float pin_capacitance_min_fall 0.000523
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float pin_capacitance_min_rise 0.000595
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string pin_direction in
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float power_rail_voltage_max 0.850000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float power_rail_voltage_min 0.850000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP boolean propagated_clock false
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_input_threshold_pct_fall_max 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_input_threshold_pct_fall_min 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_input_threshold_pct_rise_max 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_input_threshold_pct_rise_min 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_output_threshold_pct_fall_max 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_output_threshold_pct_fall_min 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_output_threshold_pct_rise_max 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_output_threshold_pct_rise_min 50.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_derate_from_library_max 0.500000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_derate_from_library_min 0.500000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_lower_threshold_pct_fall_max 30.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_lower_threshold_pct_fall_min 30.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_lower_threshold_pct_rise_max 30.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_lower_threshold_pct_rise_min 30.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_upper_threshold_pct_fall_max 70.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_upper_threshold_pct_fall_min 70.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_upper_threshold_pct_rise_max 70.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float rc_slew_upper_threshold_pct_rise_min 70.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string receiver_model_type_max_fall advanced
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string receiver_model_type_max_rise advanced
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string receiver_model_type_min_fall advanced
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string receiver_model_type_min_rise advanced
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string si_noise_prop_bumps_above_high 0 0
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string si_noise_prop_bumps_above_low 0 0
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string si_noise_prop_bumps_below_high 0 0
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP string si_noise_prop_bumps_below_low 0 0
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float temperature_max -40.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float temperature_min -40.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float x_coordinate 15969600.000000
 +zx222017_htm ​   u_zx222017_hcm_top/​se_u0/​as_xtcam_ctrl_req_reg_126_/​CP float y_coordinate 9035765.000000
 +</​code>​
vlsi/pt/cp-pin-attributes.txt · 最后更改: 2016/07/13 01:21 (外部编辑)