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您的足迹:
vlsi:redhawk:def-ploc
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====== Create Ploc File From DEF File ====== ===== Ploc File Format ===== Following is the syntax for a standard *.ploc file with no package model: <code> <die_pad_name> <X-coord> <Y-coord> <layer> <POWER | GROUND> </code> If you want to include a package subcircuit model, then the syntax of the .ploc file should be modified as follows: <code> <die_pad_name> <X-coord_um> <Y-coord_um> <layer> <power/ground_domain_name> <Spice_pkg_port_name> </code> where the power/ground domain name is the name specified in the VDD_NETS GSR keyword, and none of the ports can be named “0’. Signal ports in the package subcircuit can be floating. Multiple pads can be connected to a single port of the package. For example, in the package model provided multiple Vdd_A domain pads can be connected to port PvddA1. The following is a sample .ploc file corresponding to the example design and package: <code> Pad_A1 3125 4340 metal6 VDD_A PvddA1 Pad_A2 3225 4340 metal7 VDD_A PvddA1 Pad_A3 3325 4340 metal6 VDD_A PvddA2 Pad_A4 3425 4340 metal6 VDD_A PvddA2 Pad_B1 5125 4340 metal7 VDD_B PvddB1 Pad_B2 5225 4340 metal7 VDD_B PvddB1 Pad_B3 5335 4340 metal6 VDD_B PvddB2 Pad_B4 5335 4340 metal6 VDD_B PvddB2 Pad_VSS1 6125 4340 metal7 VSS Pvss1 Pad_VSS2 6225 4340 metal6 VSS Pvss1 Pad_VSS3 6325 4340 metal7 VSS Pvss2 Pad_VSS4 6425 4340 metal7 VSS Pvss2 ... </code> The *.ploc file is imported into RedHawk using standard procedure.
vlsi/redhawk/def-ploc.txt
· 最后更改: 2011/09/13 03:34 (外部编辑)
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