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vlsi:icc:write-verilog

Post Route Write Verilog

Write verilog for STA:

set dir .
set topLevel zx211000_htm
set version 0818_1320
 
###### Name changes 
## using icc native command (extra rule for some LSI legacy tools)
define_name_rules verilog -case_insensitive
change_names -hierarchy -rules verilog -verbose
write_verilog -no_unconnected_cells ${dir}/${topLevel}.${version}.v
vlsi/icc/write-verilog.txt · 最后更改: 2010/08/18 05:56 (外部编辑)